An in-memory computing multiply-and-accumulate circuit based on ternary STT-MRAMs for convolutional neural networks

In-memory computing (IMC) quantized neural network (QNN) accelerators are extensively used to improve energy-efficiency. However, ternary (TNN) with bitwise operations in nonvolatile memory lacked. In addition, specific generally for a single algorithm limited applications. this report, multiply-and-accumulate (MAC) circuit based on spin-torque transfer magnetic random access (STT-MRAM) is proposed, which allows writing, reading, and multiplying accumulations near memory. The design promising scheme implement hybrid binary accelerators.